Principal Investigator

Tushar Krishna

Tushar Krishna is an Assistant Professor in the School of ECE at Georgia Tech since 2015. He has a Ph.D. in Electrical Engineering and Computer Science from MIT (2014), a M.S.E in Electrical Engineering from Princeton University (2009), and a B.Tech in Electrical Engineering from the Indian Institute of Technology (IIT) Delhi (2007).

Before joining Georgia Tech, Dr. Krishna spent a year as a post-doctoral researcher at Intel, Massachusetts, and a semester at the Singapore-MIT Alliance for Research and Technology.

Dr. Krishna’s research spans the computing stack: from circuits/physical design to microarchitecture to system software. His key focus area is in architecting the interconnection networks and communication protocols for efficient data movement within computer systems, both on-chip and in the cloud.

Contact: tushar <at> ece <dot> gatech <dot> edu

PhD Students

Hyoukjun Kwon

Hyoukjun Kwon received the B.S. degree in Computer Science and Engineering (CSE) and Environmental Materials Science (EMS) from Seoul National University (SNU) in 2015.
He joined Georgia Tech as a CS Ph.D. student in 2015.

His research interests are in interconnection networks for emerging computer systems and hardware including heterogeneous systems, accelerators, and multichip packages.

Contact: hyoukjun <at> gatech <dot> edu

 Mayank Parasar

Mayank Parasar received the B.Tech (Hons) in Instrumentation Engineering from Indian Institute of Technology (IIT), Kharagpur in 2013.

Following his bachelors, Mayank worked at NVidia India, Bangalore Design Center performing architectural validation of NVidia’s in-house CPU for 2 years.

He joined Georgia Tech as an ECE PhD candidate in 2015. He is also the recipient of “Otto & Jenny Krauss Fellow” award at Georgia Tech.

Mayank received the M.S. degree from the School of Electrical and Computer Engineering at Georgia Tech in 2017.

His research interests include Network on Chip (NoC), memory systems and system software/application layer co-design.

Contact: mparasar <at> gatech <dot> edu

Ananda Samajdar

Ananda Samajdar received a B.Tech. (Hons) in Electronics and Communication engineering from Indian Institute of Information Technology (IIIT), Allahabad in 2013.
He also worked in the CHiPES lab at NTU, Singapore in the final semester of his undergrad.

Following his bachelors, Ananda worked at Qualcomm India, Bangalore Design Center in the SoC integration and power teams as a front-end VLSI engineer for 3 years.
He joined Georgia Tech as an ECE PhD student in 2016.

His research focusses on computer architecture, with an emphasis on interconnect networks and accelerator design for machine learning workloads. He is also highly interested in deep learning algorithms and VLSI design.

Contact: anandsamajdar <at> gatech <dot> edu

Eric Qin

Eric Qin received his B.S. degree in Electrical Engineering from Arizona State University (ASU) in 2017.
He joined Georgia Tech as an ECE PhD candidate in 2017.

Eric’s research interests include interconnection networks, deep learning accelerators, machine learning, and computer architecture.

Contact: ecqin <at> gatech <dot> edu

MS Students

  • Parth Mannan (MS, ECE, Expected: Fall 2018)

Undergraduate Students

  • Yehowshua Immanuel (BS, ECE)
  • Fei Wu (BS, ECE, Expected: Spring 2018)
    • Winner of Georgia Tech President’s Undergraduate Research Award (PURA) for Summer 2017


Zhongyuan Zhao (2017-18)

Zhongyuan Zhao received the B.S. degree in Electronic Information Engineer from Harbin Institute of Technology in 2012. He is a PhD student in ECE at the Shanghai JiaoTong University.
He is currently a visiting student in Georgia Tech hosted by professor Tushar Krishna.

Zhongyuan’s research focuses on compiler and architecture design for merging computing system such as reconfigurable computing system and DNN accelerators.

Contact: zyzhao.sjtu <at> gmail <dot> com

  • Sachit Kuhar (IIT Guwahati) – Summer 2018


      • Srikant Bharadwaj (MS, ECE, 2017)
        • Thesis: Scaling Address Translation in Multi-core Architectures using Low-Latency Interconnects
        • First Employment: AMD Research (GPU Micro-architecture)
      • Brian Lebiednik (MS, CS, 2017)
        • First Employment: Instructor, Army Cyber Institute, West Point
      • Aniruddh Ramrakhyani (MS, ECE, 2017)



The whole is greater than the sum of its parts