Principal Investigator
Tushar Krishna is an Associate Professor in the School of ECE at Georgia Tech since 2015. He held the ON Semiconductor (Endowed) Junior Professorship from 2019-2021. He has a Ph.D. in Electrical Engineering and Computer Science from MIT (2014), a M.S.E in Electrical Engineering from Princeton University (2009), and a B.Tech in Electrical Engineering from the Indian Institute of Technology (IIT) Delhi (2007).
Before joining Georgia Tech, Dr. Krishna spent a year as a post-doctoral researcher at Intel, Massachusetts, and a semester at the Singapore-MIT Alliance for Research and Technology.
Dr. Krishna’s research spans the computing stack: from circuits/physical design to microarchitecture to system software. His key focus area is in architecting the interconnection networks and communication protocols for efficient data movement within computer systems, for on-chip, HPC and cloud platforms.
Contact: tushar <at> ece <dot> gatech <dot> edu
Post-doctoral Researchers
Joongun Park is a postdoctoral researcher at Georgia Tech. He earned his Ph.D. in Computer Science from KAIST in 2023, an M.S. in 2018, and a B.S. in 2016, all from KAIST as well. His Ph.D. focused on hardware security, particularly Trusted Execution Environments. Currently, he is actively involved in advancing next-generation supercomputer architecture with Intel.
Contact: jpark3234 <at> gatech <dot> edu
PhD Students
Geonhwa Jeong received a B.S. degree in Creative IT Engineering (CiTE) and Computer Science and Engineering (CSE) from Pohang University of Science and Technology (POSTECH) in 2019. He joined Georgia Tech as a Computer Science (CS) Ph.D. student in 2019.
His research interests include hardware-software co-design for emerging DNNs, accelerator design, heterogeneous architecture, and interconnection networks.
Contact: geonhwa <dot> jeong <at> gatech <dot> edu
William (Jonghoon) Won received his B.S. degree in Computer Science and Engineering (CSE) from Seoul National University (SNU) in 2019. He joined Georgia Tech as a Computer Science (CS) Ph.D. student in 2019.
His research interests include DNN accelerator designs, DNN software-hardware co-design, machine learning, big data analytics, and interconnection networks.
Contact: william.won <at> gatech <dot> edu
Raveesh Garg received his BE(Hons) degree in Electronics and Instrumentation Engineering from Birla Institute of Technology and Science (BITS), Pilani, Pilani Campus, India in 2019. He joined Georgia Tech as an ECE graduate student in Fall 2019 and joined the Synergy Lab in Fall 2020.
His research interests include Computer Architecture, On-chip Networks and Domain Specific Hardware Architectures for AI and Scientific applications.
Contact: raveesh.g <at> gatech <dot> edu
Jianming Tong received B.E. degree in Electrical Engineering (EE) from Xi`an Jiaotong University supervised by Prof. Pengju Ren in 2020. After spending 8 months as a research assistant in Tsinghua University supervised by Prof. Yu Wang, he joined the Georgia Tech as a Computer Science (CS) Ph.D. student in Spring 2021.
His research interest include domain-specific architecture, on-chip network and robotics..
Contact: jtong45 <at> gatech <dot> edu
Abhimanyu Bambhaniya received his B.Tech. (with Honors) in Electronics and Communication Engineering from the Indian Institute of Technology, Roorkee (IITR) in 2019.
From 2019-21, Abhimanyu worked at Alphaics, Bangalore, a startup developing an AI engine for edge-inference applications for two years after his bachelor’s. There he worked on SoC tape-out on 16nm FFC. He was part of the team responsible for Neural Engine’s design, power, area optimization, and SoC implementation on FPGA and ASIC.
He joined Georgia Tech as an ECE Ph.D. student in Fall 2021.
Abhimanyu’s research focuses on Computer Architecture, specifically efficient accelerators for AI and related emerging applications,. He is also highly interested in deep learning algorithms and VLSI design. He likes to be informed on modern trends in semiconductors, quantum computing, and robotics. His hobbies include hiking, and visiting new places, and general reading (Psychology, History, and geography).
Contact: abambhaniya3 <at> gatech <dot> edu
(Co-Advised with Kishore Ramachandran)
Difei Cao is a Ph.D. student at Georgia Tech doing research on Edge Computing Systems, advised by Professor Tushar Krishna and Professor Kishore Ramachandran. Difei believes that geo-distributed computing will be omnipresent for devices on the Edge of the network, such as mobile phones and cameras. Difei graduated from Rensselaer Polytechnic Institute in 2020 with Bachelor’s Degree in Electrical Engineering and was awarded one of the two Harold N. Travett Awards in that graduation year. Difei also plays badminton and was a national second-level athlete in China.
Contact: difei.cao <at> gatech <dot> edu
(Co-Advised with Arijit Raychowdhury)
Zishen Wan is a Ph.D. student at Georgia Tech ECE, co-advised by Profs. Arijit Raychowdhury and Tushar Krishna. Before joining Georgia Tech, he received his B.S. from Harbin Institute of Technology, and M.S. from Harvard University supervised by Prof. Vijay Janapa Reddi. Zishen’s research interests are computer architecture and VLSI, with a focus on designing resilient and efficient hardware and systems for autonomous machines and cognitive AI.
Contact: zishenwan <at> gatech <dot> edu
(Co-Advised with Kishore Ramachandran)
Jinsun Yoo received his B.S. degree in Computer Science and Engineering(CSE) from Seoul National University (SNU) in 2021. He joined Georgia Tech as a Computer Science (CS) Ph.D. student in 2021. Jinsun’s research interests are focused building systems on the edge that can support realtime situation awareness applications. He is currently looking at problems across system and architecture area. In his free time Jinsun plays the double bass as a proud member of the Emory University Symphony Orchestra.
Contact: jinsun <at> gatech <dot> edu
Canlin Zhang received his B.S. degree in Electrical Engineering from University of Illinois (UIUC) in 2020. He joined Georgia Tech as an ECE graduate student in Fall 2020 and joined the Synergy Lab in Fall 2021.
His research interests include domain-specific accelerator design space exploration (DSE) and architectural simulation. He is also interested in the usage of 3D IC and Compute-In-Memory (CIM) for domain-specific accelerators.
Contact: canlinz2 <at> gatech <dot> edu
Jamin Seo received her B.S. degree in Electrical and Computer Engineering (ECE) from Seoul National University (SNU) in 2019. She joined Georgia Tech as an ECE Ph.D. student in 2019.
Her research interests include domain-specific architectures, sparse DNN accelerators, multi-tenant DNN acceleration, and machine learning for design space exploration.
Contact: jseo89 <at> gatech <dot> edu
Changhai Man
Changhai Man received B.E. degree in School of Micro-Electronic from Southern University of Science and Technology (SUSTech) supervised by Prof. Hao Yu in 2022. He joined the Georgia Tech as an Electrical and Computer Engineering (ECE) Ph.D. student in Fall 2022, and joined Synergy Lab in Spring 2023. His research interests are focused on efficient neural networks on edge, as well as distributed/heterogeneous systems. Also, he is interested in VLSI designs and domain specific hardware architectures for AI and scientific computing.
Contact: cman8 <at> gatech <dot> edu
Hanjiang Wu
Hanjiang Wu received his B.S. degree Electrical Engineering and Computer Science from University of Wisconsin-Madison in 2022. He joined Synergy Lab in Spring 2023 and became a Ph.D student in Fall 2023. His interest include AI/ML Accelerators and Simulators, HPC systems, Graph Analytics and Digital Circuits.
Contact: hwu419 <at> gatech <dot> edu
Hanchen Yang
Hanchen Yang joined Georgia Tech ECE as a Ph.D. student advised by Prof. Tushar Krishna in Spring 2023. He also worked on 5G modem ASIC design at Qualcomm, San Diego from 2020 to 2023. Prior to that, he received his M.S. from Carnegie Mellon University, and his B.S. from Beijing University of Posts and Telecommunications. His research interests include Computer Architecture, Neural-Symbolic AI, and Hardware-Software Co-design for novel ML applications.
Contact: hanchen<at>gatech<dot>edu
Ritik Raj
Ritik Raj received his BTech degree in Electronics and Communication Engineering (ECE) from Indian Institute of Technology (IIT), Roorkee, India in 2023. He joined Georgia Tech as an ECE PhD student in Fall 2023. His research interests include Computer Architecture, specifically AI and domain-specific accelerators, FPGA, and architecture simulator design.
Contact: ritik.raj <at> gatech <dot> edu
Hao Kang
Hao Kang received his BTech in Computer Science(CS) from Zhejiang University(ZJU) in 2023. He Joined Georgia Tech as a SCS Ph.D. student in Fall2023. His research interests include model compression, ML model profilers/simulators, and Mlsys for special models(e.g. LLM) and systems(e.g. quantum system).
Contact: hkang342 <at> gatech <dot> edu
Akshat RamachandranAkshat Ramachandran received his Bachelor’s in Technology (B.Tech) in Electronic Engineering from Veermata Jijabai Technological Institute (VJTI), Mumbai in 2022, where he was advised by Prof. John Gustafson (Arizona State University). His undergraduate thesis was on “Next-Generation Processor Architectures for Computer Vision ” .
From 2022-2023, he worked at Samsung Research as a Visual Intelligence Researcher in the development and commercialization of hardware-aware DNN architectures and accelerated hardware implementations of Spatial Understanding solutions for Samsung Mixed Reality headsets. He joined Georgia Tech as an Electrical and Computer Engineering (ECE) M.S./Ph.D. student in Fall 2023.
His research interests include hardware-software co-design for DNN accelerator design, DNN model compression, computer arithmetic and computer vision.
Contact: akshat.r <at> gatech <dot> edu
MS Students
- Anirudh Itagi (ECE)
- Ziwei Li (ECE)
- Huan Xu (CS)
Undergraduate Students
Visitors
- Yu-Chuan (Frank) Chuang, (PhD, National Taiwan University) – Fall 2022 to Spring 2023
- Martina Gallego Jené, (BSc, UPC Spain) – Summer 2022 to Fall 2022
- Francisco Muñoz-Martínez (PhD, University of Murcia) – Fall 2021
- Jan Moritz Joseph (PhD, Otto-von-Guericke-Universität Magdeburg, Germany) – Fall 2019 to Spring 2020
- Roberto Guirado (BSc, UPC Spain) – Spring 2019
- Sachit Kuhar (BTech, IIT Guwahati) – Summer 2018
- Zhongyuan Zhao (PhD, Shanghai Jiaotong University) – Fall 2017 to Spring 2018
Alumni
Post-doctoral Researchers
Taekyung Heo (PostDoc, ECE, 2023)
- Key Open-source Artifacts from PostDoc: Chakra: Advancing Performance Benchmarking and Co-design using Standardized Execution Traces
- First Employment: NVIDIA
- Contact: taekyung <at> gatech <dot> edu
PhD
#7 Srikant Bharadwaj (PhD, ECE, 2023)
- Thesis: Design of High-Performance and Energy-efficient Interconnection Systems for Heterogeneous Multi-chiplet Graphics Processing Units
- Key Open-source Artifacts from PhD:
- First Employment:
AMD Research- Now at Microsoft Research
- Contact: srikant <at> gatech <dot> edu
#6 Saeed Rashidi (PhD, ECE, 2023)
- Thesis: HW-SW Methods for Modeling and Optimizing Communication for Scalable Training of Deep Learning Models
- Key Open-source Artifacts from PhD:
- ASTRA-sim – An Open-source Distributed Deep Learning Training Simulator Infrastructure (Tutorials at ASPLOS 2022, ISCA 2022, MLSys 2022, ASPLOS 2023)
- First Employment: HPE Labs
- Contact: saeed <dot> rashidi <at> gatech <dot> edu
#5 Sheng-Chun (Felix) Kao (PhD, ECE, 2022)
- Thesis:Domain-aware Genetic Algorithms for Hardware and Mapping Co-Optimization for Efficient DNN Acceleration
- Key Highlights/Awards from PhD:
- “Best PhD Thesis” Award from the Sigma Xi Scientific Honor Society’s Georgia Tech chapter.
- Key Open-source Artifacts from PhD:
- GAMMA – A Domain-aware Genetic Algorithm for Mapping DNNs on Accelerators (ICCAD 2020)
- DiGamma – A Domain-aware Genetic Algorithm for HW-Mapping Co-optimization for DNN Accelerators (DATE 2022)
- ConfuciuX – Autonomous Hardware Resource Assignment for DNN Accelerators using Reinforcement Learning (MICRO 2020)
- MAGMA – An Optimization Framework for Mapping Multiple DNNs on Multiple Accelerator Cores (HPCA 2022)
- First Employment: Waymo
- Contact: felix <at> gatech <dot> edu
#4 Eric Qin (PhD, ECE, 2022)
- Thesis:Building Efficient Tensor Accelerators for Sparse and Irregular Workloads
- Key Highlights/Awards from PhD:
- Best Paper Nominee at IPDPS 2022
- Best Paper at HPCA 2020
- Key Open-source Artifacts from PhD:
- SIGMA Verilog (HPCA 2020)
- HLS Generator for Sparse Accelerators
- First Employment: Meta
- Contact: ecqin <at> gatech <dot> edu
#3 Ananda Samajdar (PhD, ECE, 2021)
- Thesis:Methodology and Analysis for Efficient Custom Architecture Design using Machine Learning
- Key Highlights/Awards from PhD:
- Presentation at DAC PhD Forum 2022
- Best Paper at HPCA 2020
- Honorable Mention in IEEE Micro Top Picks 2019
- Silver Medalist at ACM Student Research Competition, ASPLOS 2019
- Finalist at ACM Student Research Competition, ASPLOS 2018
- Key Open-source Artifacts from PhD:
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- SCALE-sim DNN Accelerator Simulator (ISPASS 2020)
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- First Employment: IBM Research
- Contact: anandsamajdar <at> gatech <dot> edu
#2 Mayank Parasar (PhD, ECE, 2020)
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- Thesis:Subactive Techniques for Guaranteeing Routing and Protocol Deadlock Freedom in Interconnection Networks
- Key Highlights/Awards from PhD:
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- Best Paper Nominee at SC 2021
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- Key Open-source Artifacts from PhD:
- First Employment: Samsung Austin Research Center
- Contact: mparasar <at> gatech <dot> edu
#1 Hyoukjun Kwon (PhD, SCS, 2020)
- Thesis: Data- and Communication-centric Approaches to Model and Design Flexible Deep Neural Network Accelerators
- Key Highlights/Awards from PhD:
- Honorable Mention at ACM SIGARCH / IEEE CS TCCA Outstanding Dissertation Award 2021
- Best Paper at HPCA 2020
- IEEE Micro Top Picks 2020
- Qualcomm Innovation Fellowship Finalist 2019
- Honorable Mention in IEEE Micro Top Picks 2019
- ACM Student Research Competition Finalist at MICRO 2018
- Key Open-source Artifacts from PhD:
- First Employment:
Facebook Reality Labs- Now Assistant Professor, University of California, Irvine
MS
- Yangyu Chen (MS, ECE, 2023)
- First Employment: Apple
- Anshuman Vatsan (MS, ECE, 2023)
- First Employment: NVIDIA
- Matthew Denton(MS, ECE, 2021)
- Thesis: Acceleration of Sparse Matrix Multiplication using Bit-Serial Arithmetic
- First Employment: Luminous Computing
- Yehowshua Immanuel (BS + MS, ECE, 2020)
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- Thesis: Plug-and-Play FOSS ML Accelerator: From Concept to Conception
- First Employment: Founder of ChipEleven (Startup)
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- Vineet Nadella(BS + MS, ECE, 2020)
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- Thesis: Investigating Opportunities and Challenges in Modeling and Designing Scale-Out DNN Accelerators
- First Employment: Amazon
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- Parth Mannan(MS, ECE, 2018)
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- Thesis: Exploring Opportunities and Challenges in Enabling Neuro-Evolutionary Algorithms in Hardware
- First Employment: NVIDIA
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- Srikant Bharadwaj(MS, ECE, 2017)
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- Thesis: Scaling Address Translation in Multi-core Architectures using Low-Latency Interconnects
- First Employment: AMD Research (GPU Micro-architecture)
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- Aniruddh Ramrakhyani(MS, ECE, 2017)
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- Thesis: Deadlock Recovery in On-Chip Interconnection Networks
- First Employment: Apple
- Now at Google
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- Brian Lebiednik (MS, CS, 2017)
- First Employment: Instructor, Army Cyber Institute, West Point