Members

Principal Investigator

Tushar Krishna

Tushar Krishna is an Assistant Professor in the School of ECE at Georgia Tech since 2015. He also holds the ON Semiconductor Endowed Junior Professorship. He has a Ph.D. in Electrical Engineering and Computer Science from MIT (2014), a M.S.E in Electrical Engineering from Princeton University (2009), and a B.Tech in Electrical Engineering from the Indian Institute of Technology (IIT) Delhi (2007).

Before joining Georgia Tech, Dr. Krishna spent a year as a post-doctoral researcher at Intel, Massachusetts, and a semester at the Singapore-MIT Alliance for Research and Technology.

Dr. Krishna’s research spans the computing stack: from circuits/physical design to microarchitecture to system software. His key focus area is in architecting the interconnection networks and communication protocols for efficient data movement within computer systems, both on-chip and in the cloud.

Contact: tushar <at> ece <dot> gatech <dot> edu

PhD Students

Ananda Samajdar

Ananda Samajdar received a B.Tech. (Hons) in Electronics and Communication engineering from Indian Institute of Information Technology (IIIT), Allahabad in 2013. He also worked in the CHiPES lab at NTU, Singapore in the final semester of his undergrad.

Following his bachelors, Ananda worked at Qualcomm India, Bangalore Design Center in the SoC integration and power teams as a front-end VLSI engineer for 3 years.
He joined Georgia Tech as an ECE PhD student in 2016.

His research focusses on computer architecture, with an emphasis on interconnect networks and accelerator design for machine learning workloads. He is also highly interested in deep learning algorithms and VLSI design.

Contact: anandsamajdar <at> gatech <dot> edu

Eric Qin

Eric Qin received his B.S. degree in Electrical Engineering from Arizona State University (ASU) in 2017.
He joined Georgia Tech as an ECE PhD candidate in 2017.

Eric’s research interests include interconnection networks, deep learning accelerators, machine learning, and computer architecture.

Contact: ecqin <at> gatech <dot> edu

Sheng-Chun (Felix) Kao

Sheng-Chun (Felix) Kao received his B.S and M.S. degrees in Electrical Engineering from National Taiwan University in 2017.
He joined Georgia Tech as an ECE Ph.D. student in 2018.

Felix’s research interests include deep learning accelerators, machine learning, computer architecture, interconnection networks, and VLSI design.

Contact: felix <at> gatech <dot> edu

Saeed Rashidi

Saeed Rashidi received his BS from Shiraz University in 2015, and his MS from Sharif University of Technology in 2017, both in Computer Engineering. He joined Georgia Tech in Spring 2019 to start his PhD in Electrical & Computer Engineering.

His research interests are DNN Training/Inference Accelerators, Scalable Training HW/SW co-design, ML algorithms and Domain-Specific accelerator design in general.

Contact: saeed <dot< rashidi <at> gatech <dot> edu

Matthew Denton

Matthew Denton received his B.S. degree in Computer Engineering from Auburn University in 2018. He joined Georgia Tech as a ECE Ph.D. student in 2018, joining Synergy in 2019. He’s the recipient of Georgia Tech’s Presidential Fellowship, and was selected as the 2019 ECE Outstanding Graduate Teaching Assistant.

His research interest is DNN training and its architecture-level acceleration.

Contact: matthewdenton <at> gatech <dot> edu

Geonhwa Jeong

Geonhwa Jeong received a B.S. degree in Creative IT Engineering (CiTE) and Computer Science and Engineering (CSE) from Pohang University of Science and Technology (POSTECH) in 2019. He joined Georgia Tech as a Computer Science (CS) Ph.D. student in 2019.

His research interests include hardware-software co-design for emerging DNNs, accelerator design, heterogeneous architecture, and interconnection networks.

Contact: geonhwa <dot< jeong <at> gatech <dot> edu

William (Jonghoon) Won

William (Jonghoon) Won received his B.S. degree in Computer Science and Engineering (CSE) from Seoul National University (SNU) in 2019. He joined Georgia Tech as a Computer Science (CS) Ph.D. student in 2019.

His research interests include DNN accelerator designs, DNN software-hardware co-design, machine learning, big data analytics, and interconnection networks.

Contact: william.won <at> gatech <dot> edu

Raveesh Garg

Raveesh Garg received his BE(Hons) degree in Electronics and Instrumentation Engineering from Birla Institute of Technology and Science (BITS), Pilani, Pilani Campus, India in 2019. He joined Georgia Tech as an ECE graduate student in Fall 2019 and joined the Synergy Lab in Fall 2020.

His research interests include Computer Architecture, On-chip Networks and Domain Specific Hardware Architectures for AI and Scientific applications.

Contact: raveesh.g <at> gatech <dot> edu

MS Students

Undergraduate Students

  • David Pan (BS, ECE)

Visitors

    • Jan Moritz Joseph (PhD, Otto-von-Guericke-Universität Magdeburg, Germany) – Fall 2019 to Spring 2020
    • Roberto Guirado (BSc, UPC Spain) – Spring 2019
    • Sachit Kuhar (BTech, IIT Guwahati) – Summer 2018
    • Zhongyuan Zhao (PhD, Shanghai Jiaotong University) – Fall 2017 to Spring 2018

Alumni

PhD
    • Mayank Parasar (PhD, ECE, 2020)
        • Thesis: Subactive Techniques for Guaranteeing Routing and Protocol Deadlock Freedom in Interconnection Networks
        • First Employment: Samsung Austin Research Center
        • Contact: mparasar <at> gatech <dot> edu
    • Hyoukjun Kwon (PhD, SCS, 2020)
        • Thesis: Data- and Communication-centric Approaches to Model and Design Flexible Deep Neural Network Accelerators
        • First Employment: Facebook Reality Labs
        • Contact: hyoukjun <at> gatech <dot> edu
MS (Thesis)
    • Yehowshua Immanuel (BS + MS, ECE, 2020)
        • Thesis: Plug-and-Play FOSS ML Accelerator: From Concept to Conception
        • First Employment: Founder of ChipEleven (Startup)
    • Vineet Nadella (BS + MS, ECE, 2020)
        • Thesis: Investigating Opportunities and Challenges in Modeling and Designing Scale-Out DNN Accelerators
        • First Employment: Amazon
    • Parth Mannan (MS, ECE, 2018)
        • Thesis: Exploring Opportunities and Challenges in Enabling Neuro-Evolutionary Algorithms in Hardware
        • First Employment: NVIDIA
    • Srikant Bharadwaj (MS, ECE, 2017)
        • Thesis: Scaling Address Translation in Multi-core Architectures using Low-Latency Interconnects
        • First Employment: AMD Research (GPU Micro-architecture)
    • Aniruddh Ramrakhyani (MS, ECE, 2017)
MS
    • Fei Wu (BS + MS, ECE, 2019)
        • Winner of Georgia Tech President’s Undergraduate Research Award (PURA) for Summer 2017
        • First Employment: Microsoft
    • Brian Lebiednik (MS, CS, 2017)
      • First Employment: Instructor, Army Cyber Institute, West Point

Collaborators

Academic

Industry

    • Brad Beckmann (AMD Research)
    • Dipankar Das (Intel)
    • Abhishek Jain (Xilinx)
    • Angshuman Parashar (NVIDIA Research)
    • Michael Pellauer, (NVIDIA Research)
    • Srinivas Sridharan (Facebook)
    • Sudarshan Srinivasan (Intel)
    • Sree Subramoney (Intel)
    • Paul Whatmough (ARM Research)

National Labs

    • Roberto Gioiosa (Pacific Northwest National Labs)
    • Clay Hughes (Sandia National Labs)
    • Gokcen Kestor (Pacific Northwest National Labs)
    • Gordon Moon (Sandia National Labs)
    • Siva Rajamanickam (Sandia National Labs)

The whole is greater than the sum of its parts