Books
Data Orchestration in Deep Learning Accelerators
Tushar Krishna, Hyoukjun Kwon, Michael Pellauer, Angshuman Parashar, Ananda Samajdar
Synthesis Lectures on Computer Architecture, Morgan Claypool Publishers, August 2020
[Abstract][Purchase the book from here][Free for universities]
On Chip Networks, Second Edition
Natalie Enright Jerger, Tushar Krishna, and Li-Shiuan Peh
Synthesis Lectures on Computer Architecture, Morgan Claypool Publishers, June 2017
[Abstract][Purchase the book from here][Free for universities]
Book Chapters
Interconnect Modeling for Homogeneous and Heterogeneous Multiprocessors
Srikant Bharadwaj and Tushar Krishna
Network-on-Chip Security and Privacy, Springer, May 2021
[Springer][Amazon]
Application Benchmarking
Geoffrey Burr, Tom Conte, Paolo Gargini, Vladimir Getov, Yoshihiro Hayashi, Takeshi Iwashita, Vijay Janapa Reddi, Masaaki Kondo, Tushar Krishna, Peter M. Kogge, Anoop Nair, Dam Sunwoo, Josep Torrelas, Peter Torelli
International Roadmap for Devices and Systems, 2020 Edition
Refereed Conferences and Journals
2024
Enhancing Scalability and Performance in Influence Maximization with Optimized Parallel Processing
Hanjiang Wu, Huan Xu, Joongun Park, Jesmin Jahan Tithi, Fabio Checconi, Jordi Wolfson-Pou, Fabrizio Petrini, Tushar Krishna
In Proc of 14th Workshop on Irregular Applications: Architectures and Algorithms (IA^3), Nov 2024
[code]
TACOS: Topology-Aware Collective Algorithm Synthesizer for Distributed Machine Learning
William Won, Midhilesh Elavazhagan, Sudarshan Srinivasan, Swati Gupta, and Tushar Krishna
In Proc. of the 57th IEEE/ACM International Symposium on Microarchitecture (MICRO), Nov 2024
[pdf][code]
Real-time Digital RF Emulation – II: A Near Memory Custom Accelerator
Xiangyu Mao, M. Mukherjee, N. Mizanur Rahman, C. DeLude, J. Driscoll, S. Sharma, P. Behnam, U. Kamal, J. Woo, D. Kim, S. Khan, Jianming Tong, J. Seo, P. Sinha, M. Swaminathan, Tushar Krishna, S. Pande, J. Romberg, S. Mukhopadhyay
IEEE Transactions on Radar Systems (TRadar), Sep 2024
[pdf]
Towards Efficient Neuro-Symbolic AI: From Workload Characterization to Hardware Architecture
Zishen Wan, Che-Kai Liu, Hanchen Yang, Ritik Raj, Chaojian Li, Haoran You, Yonggan Fu, Cheng Wan, Sixu Li, Youbin Kim, Ananda Samajdar, Yingyan (Celine) Lin, Mohamed Ibrahim, Jan M. Rabaey, Tushar Krishna, Arijit Raychowdhury
In IEEE Transactions on Circuits and Systems for Artificial Intelligence (TCASAI), Sep 2024
Understanding Performance Implications of LLM Inference on CPUs
Seonjin Na, Geonhwa Jeong, Byunghoon Ahn, Jeffrey Young, Tushar Krishna and Hyesoon Kim
In Proc. of the IEEE International Symposium on Workload Characterization (IISWC), Sep 2024
CLAMP-ViT: Contrastive Data-Free Learning for Adaptive Post-Training Quantization of ViTs
Akshat Ramachandran, Souvik Kundu, and Tushar Krishna
In Proc. of the 18th European Conference on Computer Vision (ECCV), Sep 2024
[pdf][code]
Towards a Standardized Representation for Deep Learning Collective Algorithms
Jinsun Yoo, William Won, Meghan Cowan, Nan Jiang, Benjamin Klenk, Srinivas Sridharan, and Tushar Krishna
In Proc. of the 31st IEEE Hot Interconnects Symposium (HotI), Aug 2024
[pdf][code]
FEATHER: A Reconfigurable Accelerator with Data
Reordering Support for Low-Cost On-Chip Dataflow Switching
Jianming Tong, Anirudh Itagi, Prasanth Chatarasi, and Tushar Krishna
In Proc. of 51th International Symposium on Computer Architecture (ISCA), Jun 2024.
[pdf][code][slide][isca_official_talk][deep_dive_talk]
LIBRA: Enabling Workload-aware Multi-dimensional Network Topology Optimization for Distributed Training of Large AI Models
William Won, Saeed Rashidi, Sudarshan Srinivasan, and Tushar Krishna
In Proc. of the 2024 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), May 2024.
[pdf]
Towards Cognitive AI Systems: Workload and Characterization of Neuro-Symbolic AI
Zishen Wan, Che-Kai Liu, Hanchen Yang, Ritik Raj, Chaojian Li, Haoran You, Yonggan Fu, Cheng Wan, Ananda Samajdar, Yingyan (Celine) Lin, Tushar Krishna, and Arijit Raychowdhury
In Proc. of the 2024 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), May 2024.
[pdf]
Algorithm-Hardware Co-Design of Distribution-Aware Logarithmic-Posit Encodings for Efficient DNN Inference
Akshat Ramachandran, Zishen Wan, Geonhwa Jeong, John Gustafson and Tushar Krishna
In Proc. of the 61st Annual Design Automation Conference (DAC), Jun 2024
Acceptance Rate: 21.8% (337/1,545)
[pdf][code]
SmartPAF: Accurate Low-Degree Polynomial Approximation of Non-polynomial Operators for Fast Private Inference in Homomorphic Encryption
Jingtian Dang*, Jianming Tong*, Anupam Golder, Cong Hao, Arijit Raychowdhury, and Tushar Krishna
In Proc of Seventh Conference on Machine Learning and Systems (MLSys), May 2024
* equal contribution
[pdf][code]
H3DFact: Heterogeneous 3D Integrated CIM for Factorization with Holographic Perceptual Representations
Zishen Wan*, Che-Kai Liu*, Mohamed Ibrahim, Hanchen Yang, Samuel Spetalnick, Tushar Krishna and Arijit Raychowdhury
*Equal Contribution
In Proc of Design Automation and Test in Europe (DATE), Apr 2024
[pdf]
2023
SPOCK: Reverse Packet Traversal for Deadlock Recovery
Zeyu Chen, Ankur Bindal, Vaidehi Garg and Tushar Krishna
In Proc. of the 17th IEEE/ACM International Symposium on Networks‑on‑Chip
(NOCS), Sep 2023
[pdf][github]
++ Best Paper Award Candidate
TNT: A Modular Approach to Traversing Physically Heterogeneous NOCs at Bare-wire Latency
Gokul Subramanian Ravi, Tushar Krishna, and Mikko Lipasti
ACM Transactions on Architecture and Code Optimization (TACO), Jul 2023
[pdf]
XRBench: An Extended Reality (XR) Machine Learning Benchmark Suite for the Metaverse
Hyoukjun Kwon, Krishnakumar Nair, Jamin Seo*, Jason Yik*, Debabrata Mohapatra, Dongyuan Zhan, Jinook Song, Peter Capak, Peizhao Zhang, Peter Vajda, Colby Banbury, Mark Mazumder, Liangzhen Lai, Ashish Sirasao, Tushar Krishna, Harshit Khaitan, Vikas Chandra, Vijay Janapa Reddi
In Proc of Sixth Conference on Machine Learning and Systems (MLSys), Jun 2023
* equal contribution
[pdf][project website][github]
Hardware-Software co-design for real-time latency-accuracy navigation in tinyML applications
Payman Behnam*, Jianming Tong*, Alind Khare, Yangyu Chen, Yue Pan, Abhimanyu Bambhaniya, Pranav Gadikar, Tushar Krishna, and Alexey Tumanov
IEEE Micro, Sep 2023
* equal contribution
[pdf]
SUSHI: SUbgraph Stationary Hardware-software Inference Co-design
Payman Behnam*, Jianming Tong*, Alind Khare, Yangyu Chen, Yue Pan, Pranav Gadikar, Abhimanyu Rajeshkumar Bambhaniya, Tushar Krishna, Alexey Tumanov
In Proc of Sixth Conference on Machine Learning and Systems (MLSys), Jun 2023
* equal contribution
[pdf]
FPGA-Based High-Performance Real-Time Emulation of Radar System using Direct Path Compute Model
Xiangyu Mao*, Mandovi Mukherjee*, Nael M. Rahman*, Uday Kamal, Sudarshan Sharma, Payman Behnam, Jianming Tong, Jongseok Woo, Coleman B DeLude, Joseph W. Driscoll, Jamin Seo, Santosh Pande, Tushar Krishna, Justin Romberg, Madhavan Swaminathan, and Saibal Mukhopadhyay
In Proc of IEEE MTT-S International Microwave Symposium (IMS), Jun 2023
* equal contribution
A High Performance Computing Architecture for Real-Time Digital Emulation of RF Interactions
Mandovi Mukherjee*, Nael Mizanur Rahman*, Coleman B. DeLude*, Joseph W. Driscoll*, Uday Kamal, Jongseok Woo, Jamin Seo, Sudarshan Sharma, Xiangyu Mao, Payman Behnam, Sharjeel M. Khan, Daehyun Kim, Jianming Tong, Prachi Sinha, Santosh Pande, Tushar Krishna, Justin Romberg, Madhavan Swaminathan, and Saibal Mukhopadhyay
In Proc of IEEE Radar Conference (RadarConf), May 2023
* equal contribution
ASTRA-sim2.0: Modeling Hierarchical Networks and Disaggregated Systems for Large-model Training at Scale
William Won*, Taekyung Heo*, Saeed Rashidi*, Srinivas Sridharan, Sudarshan Srinivasan and Tushar Krishna
In Proc of the IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Apr 2023
*equal contribution
[pdf][slides][video][github]
Characterization of Data Compression in Datacenters
Geonhwa Jeong, Bikash Sharma, Nick Terrell, Abhishek Dhanotia, Zhiwei Zhao, Niket Agarwal, Arun Kejariwal, and Tushar Krishna
In Proc of the IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Apr 2023
++ Best Paper Award Candidate
Proteus: HLS based NoC Generator and Simulator
Abhimanyu Rajeshkumar Bambhaniya, Yangyu Chen, Anshuman, Rohan Banerjee and Tushar Krishna
In Proc of Design Automation and Test in Europe (DATE), Apr 2023
[pdf][github]
AIRCHITECT: Automating Hardware Architecture and Mapping Optimization
Ananda Samajdar, Jan Moritz Joseph and Tushar Krishna
In Proc of Design Automation and Test in Europe (DATE), Apr 2023
[pdf][extended-version.pdf]
Flexagon: A Multi-Dataflow Sparse-Sparse Matrix Multiplication Accelerator for Efficient DNN Processing
Francisco Muñoz-Martinez, Raveesh Garg, Michael Pellauer, Jose L. Abellan, Manuel E. Acacio and Tushar Krishna
In Proc of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Mar 2023
[pdf]
FLAT: An Optimized Dataflow for Mitigating Attention Bottlenecks
Sheng-Chun Kao, Suvinay Subramanian, Gaurav Agrawal, Amir Yazdanbakhsh and Tushar Krishna
In Proc of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Mar 2023
[pdf]
VEGETA: Vertically-Integrated Extensions for Sparse/Dense GEMM Tile Acceleration on CPUs
Geonhwa Jeong, Sana Damani, Abhimanyu Bambhaniya, Eric Qin, Christopher J. Hughes, Sreenivas Subramoney, Hyesoon Kim and Tushar Krishna
In Proc of the 29th IEEE International Symposium on High-Performance Computer Architecture (HPCA), Feb 2023
[pdf]
Acceptance Rate: 25% (91/364)
Efficient Distributed Inference of Deep Neural Networks via Restructuring and Pruning
Afshin Abdi, Saeed Rashidi, Tushar Krishna, Faramarz Fekri
In Proc of the 37’th Association for the Advancement of Artificial Intelligence (AAAI), Feb, 2023
[pdf]
2022
Demystifying Map Space Exploration for NPUs
Sheng-Chun Kao, Angshuman Parashar, Po-An Tsai and Tushar Krishna
In Proc of 2022 IEEE International Symposium on Workload Characterization (IISWC), Nov 2022
[pdf][slides][github]
MicroEdge: A Low-Cost Edge Cluster System Architecture for Scalable Camera Processing
Difei Cao*, Jinsun Yoo*, Zhuangdi Xu, Enrique Saurez, Harshit Gupta, Tushar Krishna and Umakishore Ramachandran
In 23rd ACM/IFIP International Middleware Conference (Middleware), Nov 2022
* Joint First Authors
[pdf]
++ Winner of the Best Paper Award
Impact of RoCE Congestion Control Policies on Distributed Training of DNNs
Tarannum Khan, Saeed Rashidi, Srinivas Sridharan, Pallavi Shurpali, Aditya Akella and Tushar Krishna
In Proceedings of the 29th International Symposium on High-Performance Interconnects (HotI), Aug 2022
[pdf][slides]
Self Adaptive Reconfigurable Arrays (SARA): Learning Flexible GEMM Accelerator Configuration and Mapping-space using ML
Ananda Samajdar, Eric Qin, Michael Pellauer and Tushar Krishna
In Proc. of the 59th Annual Design Automation Conference (DAC), Jul 2022
[pdf][extended-version-pdf]
Acceptance Rate: 23%
Themis: A Network Bandwidth-Aware Collective Scheduling Policy for Distributed Training of DL Models
Saeed Rashidi, William Won, Sudarshan Srinivasan, Srinivas Sridharan, and Tushar Krishna
In Proc of 49th International Symposium on Computer Architecture (ISCA), Jun 2022
[pdf]
Acceptance Rate: 16.7% (67/400)
A Formalism of DNN Accelerator Flexibility
Sheng-Chun Kao, Hyoukjun Kwon, Michael Pellauer, Angshuman Parashar and Tushar Krishna
In Proc of 2022 ACM SIGMETRICS/Performance conference (SIGMETRICS), Jun 2022
[pdf]
Acceptance Rate: 10.6% (13/122)
Understanding Data Compression in Warehouse-Scale Datacenter Services
Geonhwa Jeong , Bikash Sharma, Nick Terrell, Abhishek Dhanotia, Zhiwei Zhao, Niket Agarwal, Arun Kejariwal, and Tushar Krishna
Extended Abstract — In Proc of the IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), May 2022
[pdf]
Understanding the Design-Space of Sparse/Dense Multiphase GNN Dataflows on Spatial Accelerators
Raveesh Garg, Eric Qin, Francisco Muñoz-Martínez, Robert Guirado, Akshay Jain, Sergi Abadal, José L. Abellán, Manuel E. Acacio, Eduard Alarcón, Sivasankaran Rajamanickam, Tushar Krishna
In Proc of the 36th IEEE International Parallel & Distributed Processing Symposium (IPDPS), May 2022
[pdf][github]
++ Best Paper Award Candidate
DiGamma: A Domain-aware Genetic Algorithm for HW-Mapping Co-optimization for DNN Accelerators
Sheng-Chun Kao, Michael Pellauer, Angshuman Parashar and Tushar Krishna
In Proc of Design Automation and Test in Europe (DATE), Mar 2022
[pdf][github]
MAGMA: An Optimization Framework for Mapping Multiple DNNs on Multiple Accelerator Cores
Sheng-Chun Kao and Tushar Krishna
In Proc of the 28th IEEE International Symposium on High-Performance Computer Architecture (HPCA), Feb 2022
[pdf][github]
Acceptance Rate: 30% (80/262)
Stay in your Lane: A NoC with Low-overhead Multi-packet Bypassing
Hossein Farrokhbakht, Paul Gratz, Tushar Krishna, Joshua San Miguel and Natalie Enright Jerger
In Proc of the 28th IEEE International Symposium on High-Performance Computer Architecture (HPCA), Feb 2022
[pdf][github]
Acceptance Rate: 30% (80/262)
2021
Marvel: A Data-Centric Approach for Mapping Deep Learning Operators on Spatial Accelerators
Prasanth Chatarasi, Hyoukjun Kwon, Angshuman Parashar, Michael Pellauer, Tushar Krishna and Vivek Sarkar
ACM Transactions on Architecture and Code Optimization (TACO), 2021
[preprint-pdf]
RASA: Efficient Register-Aware Systolic Array Matrix Engine for CPU
Geonhwa Jeong, Eric Qin, Ananda Samajdar, Christopher Hughes, Sreenivas Subramoney, Hyesoon Kim and Tushar Krishna
In Proc. of the 58th Annual Design Automation Conference (DAC), Dec 2021
[pdf]
Acceptance Rate: 23%
STONNE: Enabling Cycle-Level Microarchitectural Simulation for DNN Inference Accelerators
Francisco Muñoz-Martinez, Jose L. Abellan, Manuel E. Acacio and Tushar Krishna
In Proc. of the IEEE International Symposium on Workload Characterization
(IISWC), Nov 2021
[pdf][github]
A Novel Network Fabric for Efficient Spatio-Temporal Reduction in Flexible DNN Accelerators
Francisco Muñoz-Martinez, Jose L. Abellan, Manuel E. Acacio and Tushar Krishna
In Proc. of the 15th IEEE/ACM International Symposium on Networks‑on‑Chip
(NOCS), Oct 2021
[pdf]
++ Best Paper Award Candidate
DUB: Dynamic Underclocking and Bypassing in Network-on-Chip for Heterogeneous GPU Workloads
Srikant Bharadwaj, Shomit Das, Yasuko Eckert, Mark Oskin and Tushar Krishna
Short Paper — In Proc. of the 15th IEEE/ACM International Symposium on Networks‑on‑Chip (NOCS), Oct 2021
[pdf]
Evaluating Spatial Accelerator Architectures with Tiled Matrix-Matrix Multiplication
Gordon E. Moon, Hyoukjun Kwon, Geonhwa Jeong, Prasanth Chatarasi, Sivasankaran Rajamanickam and Tushar Krishna
IEEE Transactions on Parallel and Distributed Systems (TPDS) (Special Section on Innovative R&D toward the Exascale Era), 2021
[preprint-pdf]
SEEC: Stochastic Escape Express Channel
Mayank Parasar, Natalie Enright Jerger, Paul Gratz, Joshua San Miguel and Tushar Krishna
In Proc. of International Conference for High Performance Computing, Networking, Storage, and Analysis (SC), Nov 2021
[pdf][github]
Acceptance Rate: 23% (86/365)
++ Best Paper Award Candidate
Union: A Unified HW-SW Co-Design Ecosystem in MLIR for Evaluating Tensor Operators on Spatial Accelerators
Geonhwa Jeong, Gokcen Kestor, Prasanth Chatarasi, Angshuman Parashar, Po-An Tsai, Siva Rajamanickam, Roberto Gioiosa and Tushar Krishna
In Proc. of 30th International Conference on Parallel Architectures and Compilation Techniques (PACT), Sep 2021
[pdf][github]
Acceptance Rate: 24.5% (25/102)
STONNE: Enabling Cycle-Level Microarchitectural Simulation for DNN Inference Accelerators
Francisco Muñoz-Martinez, Jose L. Abellan, Manuel E. Acacio and Tushar Krishna
In IEEE Computer Architecture Letters (CAL), Issue 2, Jul-Dec 2021
[pdf][github]
Enabling Compute-Communication Overlap in Distributed Training Platforms
Saeed Rashidi, Srinivas Sridharan, Sudarshan Srinivasan, Matthew Denton, Amoghavarsha Suresh, Jade Nie and Tushar Krishna
In Proc of 48th International Symposium on Computer Architecture (ISCA), Jun 2021
[pdf]
Acceptance Rate: 18.7% (76/406)
A Configurable Architecture for Efficient Sparse FIR Computation in Real-time Radio Frequency Systems
Jamin Seo*, Mandovi Mukherjee*, Nael Mizanur Rahman*, Jianming Tong, Coleman DeLude, Tushar Krishna, Justin Romberg, Saibal Mukhopadhyay
IEEE MTT-S International Microwave Symposium (IMS),Jun 2021
* equal contribution
Extending Sparse Tensor Accelerators to Support Multiple Compression Formats
Eric Qin, Geonhwa Jeong, William Won, Sheng-Chun Kao, Hyoukjun Kwon, Sudarshan Srinivasan, Dipankar Das, Gordon E. Moon, Sivasankaran Rajamanickam and Tushar Krishna
In Proc of the 35th IEEE International Parallel & Distributed Processing Symposium (IPDPS), May 2021
[pdf]
Architecture, Dataflow and Physical Design Implications of 3D-ICs for DNN-Accelerators
Jan Moritz Joseph, Ananda Samajdar, Lingjun Zhu, Rainer Leupers, Sung Kyu Lim, Thilo Pionteck and Tushar Krishna
In Proc of the 22nd International Symposium on Quality Electronic Design (ISQED), Apr 2021
[pdf]
Clock Delivery Network Design and Analysis for Interposer-Based 2.5-D Heterogeneous Systems
Gauthaman Murali, Heechun Park, Eric Qin, Hakki Mert Torun, Majid Ahadi Dolatsara, Madhavan Swaminathan, Tushar Krishna and Sung Kyu Lim
In IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI), Apr 2021
[pdf]
E3: A HW/SW Co-design Neuroevolution Platform for Autonomous Learning in Edge Device
Sheng-Chun Kao and Tushar Krishna
In Proc of the IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Mar 2021
[pdf]
Efficiently Solving Partial Differential Equations in a Partially Reconfigurable Specialized Hardware
Bahar Asgari, Ramyad Hadidi, Tushar Krishna, Hyesoon Kim and Sudhakar Yalamanchili
In IEEE Transactions on Computers, Feb 2021
[pdf]
Pitstop: Enabling a Virtual Network Free Network-on-Chip
Hossein Farrokhbakht, Henry Kao, Kamran Hasan, Paul Gratz, Tushar Krishna, Joshua San Miguel and Natalie Enright Jerger
In Proc of the 27th IEEE International Symposium on High-Performance Computer Architecture (HPCA), Feb 2021
[pdf]
Acceptance Rate: 24% (63/258)
Heterogeneous Dataflow Accelerators for Multi-DNN Workloads
Hyoukjun Kwon, Liangzhen Lai, Michael Pellauer, Yu-Hsin Chen, Tushar Krishna, Vikas Chandra
In Proc of the 27th IEEE International Symposium on High-Performance Computer Architecture (HPCA), Feb 2021
[pdf]
Acceptance Rate: 24% (63/258)
Dataflow-Architecture Co-Design for 2.5D DNN Accelerators using Wireless Network-on-Package
Robert Guirado*, Hyoukjun Kwon*, Sergi Abadal, Eduard Alarcon and Tushar Krishna
In Proc of the 26th Asia and South Pacific Design Automation Conference (ASP-DAC), Jan 2021
* Joint First Authors
[pdf]
Acceptance Rate: 34% (111/327)
Bridging the Frequency Gap in Heterogeneous 3D SoCs through Technology-Specific NoC Router Architecture
Jan Moritz Joseph, Lennart Bamberg, Geonhwa Jeong, Ruei-Ting Chien, Rainer Leupers, Alberto Garcia-Ortiz, Tushar Krishna and Thilo Pionteck
In Proc of the 26th Asia and South Pacific Design Automation Conference (ASP-DAC), Jan 2021
++ Best Paper Award Candidate
[pdf]
Acceptance Rate: 34% (111/327)
Flexion: A Quantitative Metric for Flexibility in DNN Accelerators
Hyoukjun Kwon, Michael Pellauer, Angshuman Parashar and Tushar Krishna
In IEEE Computer Architecture Letters (CAL), Issue 1, Jan-Jun 2021
[pdf]
2020
GAMMA: Automating the HW Mapping of DNN Models on Accelerators via Genetic Algorithm
Sheng-Chun Kao and Tushar Krishna
In Proc of the IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov 2020
[pdf][github]
Acceptance Rate: 27% (170/470)
ConfuciuX: Autonomous Hardware Resource Assignment for DNN Accelerators using Reinforcement Learning
Sheng-Chun Kao, Geonhwa Jeong and Tushar Krishna
In Proc of 53rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), Oct 2020
[pdf]
Acceptance Rate: 19% (82/424)
Breaking Barriers: Maximizing Array Utilization for Compute In-Memory Fabrics
Brian Crafton, Samuel Spetalnick, Gauthaman Murali, Tushar Krishna, Sung-Kyu Lim, and Arijit Raychowdhury
In Proc of the 28th IFIP/IEEE Int.l Conference on Very Large Scale Integration (VLSI-SoC), Oct 2020
[pdf]
Acceptance Rate: 38% (30/78)
++Winner of the Best Paper Award
Architecture, Chip, and Package Co-design Flow for 2.5D IC Design Enabling Heterogeneous IP Reuse
Jinwoo Kim, Gauthaman Murali, Heechun Park, Eric Qin, Hyoukjun Kwon, Venkata Chaitanya Krishna Chekuri, Nael Mizanur Rahman, Nihar Dasari, Arvind Singh, Minah Lee, Hakki Mert Torun, Kallol Roy, Madhavan Swaminathan, Saibal Mukhopadhyay, Tushar Krishna, and Sung Kyu Lim
In IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI), 2020
EcoTLB: Eventually Consistent TLBs
Steffen Maass, Mohan Kumar, Taesoo Kim, Tushar Krishna, and Abhishek Bhattacharjee
ACM Transactions on Architecture and Code Optimization (TACO), 2020
[pdf]
Scalable Distributed Training of Recommendation Models:An ASTRA-SIM + NS3 case-study with TCP/IP transport
Saeed Rashidi, Pallavi Shurpali, Srinivas Sridharan, Naader Hassani, Dheevatsa Mudigere, Krishnakumar Nair, Misha Smelyanski, and Tushar Krishna
In Proceedings of the 27th International Symposium on High-Performance Interconnects (HotI), Aug 2020
[pdf][slides][github]
ASTRA-SIM: Enabling SW/HW Co-Design Exploration for Distributed DL Training Platforms
Saeed Rashidi, Srinivas Sridharan, Sudarshan Srinivasan, and Tushar Krishna
In Proc of the IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Aug 2020
[pdf][slides][video][github]
A Systematic Methodology for Characterizing Scalability of DNN Accelerators using SCALE-Sim
Ananda Samajdar, Jan Moritz Joseph, Yuhao Zhu, Paul Whatmough, Matthew Mattina, and Tushar Krishna
In Proc of the IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Aug 2020
[pdf][slides][video][github]
CLAN: Exploring Continuous Learning on Commodity Edge Devices using Asynchronous Distributed Neuroevolution
Parth Mannan, Ananda Samajdar, and Tushar Krishna
In Proc of the IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Aug 2020
[pdf][slides][video]
Kite: A Family of Heterogeneous Interposer Topologies Enabled via Accurate Interconnect Modeling
Srikant Bharadwaj, Jieming Yin, Bradford M. Beckmann, and Tushar Krishna
In Proc. of the 57th Annual Design Automation Conference (DAC), Jul 2020
[pdf]
Acceptance Rate: 23% (228/991)
Co-Exploration of Neural Architectures and Heterogeneous ASIC Accelerator Designs Targeting Multiple Tasks
Lei Yang, Zheyu Yan, Meng Li, Hyoukjun Kwon, Liangzhen Lai, Tushar Krishna, Vikas Chandra, Weiwen Jiang, Yiyu Shi
In Proc. of the 57th Annual Design Automation Conference (DAC), Jul 2020
[pdf]
Acceptance Rate: 23% (228/991)
MAESTRO: A Data-Centric Approach to Understand Reuse, Performance, and Hardware Cost of DNN Mappings
Hyoukjun Kwon, Prasanth Chatarasi, Micheal Pellauer, Angshuman Parashar, Vivek Sarkar, and Tushar Krishna
In IEEE MICRO (Special Issue: Top Picks from the Computer Architecture Conferences), May/Jun 2020
[pdf][website]
SIGMA: A Sparse and Irregular GEMM Accelerator with Flexible Interconnects for DNN Training
Eric Qin, Ananda Samajdar, Hyoukjun Kwon, Vineet Nadella, Sudarshan Srinivasan, Dipankar Das, Bharat Kaul, and Tushar Krishna
In Proc of the 26th IEEE International Symposium on High-Performance Computer Architecture (HPCA), Feb 2020
[pdf][slides]
Acceptance Rate: 19% (48/248)
++ Winner of the Best Paper Award
DRAIN: Deadlock Removal for Arbitrary Irregular Networks
Mayank Parasar, Hossein Farrokhbakht, Natalie Enright Jerger, Paul Gratz, Tushar Krishna, and Joshua San Miguel
In Proc of the 26th IEEE International Symposium on High-Performance Computer Architecture (HPCA), Feb 2020
[pdf][github]
Acceptance Rate: 19% (48/248)
ALRESCHA: A Lightweight Reconfigurable Sparse-Computation Accelerator
Bahar Asgari, Ramyad Hadidi, Tushar Krishna, Hyesoon Kim and Sudhakar Yalamanchili
In Proc of the 26th IEEE International Symposium on High-Performance Computer Architecture (HPCA), Feb 2020
[pdf]
Acceptance Rate: 19% (48/248)
2019
Understanding the Impact of On-chip Communication on DNN Accelerator Performance
Robert Guirado, Hyoukjun Kwon, Eduard Alarcon, Sergi Abadal and Tushar Krishna
In Proc of 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Nov 2019
[pdf]
Characterizing the Deployment of Deep Neural Networks on Commercial Edge Devices
Ramyad Hadidi, Jiashen Cao, Yilun Xie, Bahar Asgari, Tushar Krishna, and Hyesoon Kim
In Proc of IEEE International Symposium on Workload Characterization (IISWC), Nov 2019
[pdf]
++ Best Paper Award Candidate
Understanding Reuse, Performance, and Hardware Cost of DNN Dataflows: A Data-Centric Approach using MAESTRO
Hyoukjun Kwon, Prasanth Chatarasi, Micheal Pellauer, Angshuman Parashar, Vivek Sarkar, and Tushar Krishna
In Proc of 52nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), Oct 2019
[pdf][slides][website]
Acceptance Rate: 23% (79/344)
++Selected for Inclusion in IEEE Micro’s ‘Top Picks in Computer Architecture’ Journal (2020 issue)
++ Finalist at the ACM Student Research Competition (SRC) held in conjunction with MICRO 2018.
SWAP: Synchronized Weaving of Adjacent Packets for Network Deadlock Resolution
Mayank Parasar, Natalie Enright Jerger, Paul Gratz, Joshua San Miguel, and Tushar Krishna
In Proc of 52nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), Oct 2019
[pdf][github]
Acceptance Rate: 23% (79/344)
BINDU: Deadlock-Freedom with One Bubble in the Network
Mayank Parasar and Tushar Krishna
In Proc of 13th IEEE/ACM International Symposium on Networks-on-Chip (NOCS), Oct 2019
[pdf]
Scaling the Cascades: Interconnect-aware Mapping Strategies for FPGA implementation of Machine Learning problems
Ananda Samajdar, Tushar Garg, Tushar Krishna and Nachiket Kapre
In Proc of the Field-Programmable Logic and Applications (FPL), Sept 2019
[pdf]
Acceptance Rate: 18.5% (28/151)
Architecture, Chip, and Package Co-design Flow for 2.5D IC Design Enabling Heterogeneous IP Reuse
Jinwoo Kim, Gauthaman Murali, Heechun Park, Eric Qin, Hyoukjun Kwon, Venkata Chaitanya Krishna Chekuri, Nihar Dasari, Arvind Singh, Minah Lee, Hakki Mert Torun, Kallol Roy, Madhavan Swaminathan, Saibal Mukhopadhyay, Tushar Krishna, and Sung Kyu Lim
In Proc of the 56th ACM/EDAC/IEEE Design Automation Conference (DAC), Jun 2019
[pdf]
Synchronized Progress in Interconnection Networks (SPIN) : A New Theory for Deadlock Freedom
Aniruddh Ramrakhyani, Paul Gratz, and Tushar Krishna
In IEEE MICRO (Special Issue: Top Picks from the Computer Architecture Conferences), May/Jun 2019
[pdf]
mRNA: Enabling Efficient Mapping Space Exploration for a Reconfigurable Neural
Accelerator
Zhongyuan Zhao, Hyoukjun Kwon, Sachit Kuhar, Weiguang Sheng, Zhigang Mao, and Tushar Krishna
In Proc of the IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Mar 2019
[pdf][slides]
Acceptance Rate: 29.5% (26/88)
McMahon: Minimum-cycle Maximum-hop network
Gokul Subramanian Ravi, Tushar Krishna, and Mikko Lipasti
In Proc of 4th International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems (AISTECS), Jan 2019
[Held in conjunction with the 14th HiPEAC Conference on High-Performance Embedded Architectures and Compilers]
[pdf]
2018
A Communication-Centric Approach for Designing Flexible DNN Accelerators
Hyoukjun Kwon, Ananda Samajdar, and Tushar Krishna
In IEEE Micro Special Issue on Hardware Acceleration, Nov/Dec 2018
[pdf]
Merge Network for a Non-von Neumann Accumulate Accelerator in a 3D Chip
Anirudh Jain, Sriseshan Srikanth, Erik Debenedictis, and Tushar Krishna
In Proc of 3rd IEEE International Conference on Rebooting Computing (ICRC), Nov 2018
[pdf]
GeneSys: Enabling Continuous Learning through Neural Network Evolution in Hardware
Ananda Samajdar, Parth Mannan, Kartikay Garg, and Tushar Krishna
In Proc of 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), Oct 2018
[pdf][lightning talk video][slides]
Acceptance Rate: 21% (74/351)
+ Preliminary Version of the paper presented at the 3rd Workshop on Cognitive Architectures (CogArch) 2018 held in conjunction with ASPLOS 2018.
++ Finalist at the ACM Student Research Competition (SRC) held in conjunction with ASPLOS 2018.
Scalable Distributed Last-Level TLBs Using Low-Latency Interconnects
Srikant Bharadwaj, Guilherme Cox, Tushar Krishna, and Abhishek Bhattacharjee
In Proc of 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), Oct 2018
[pdf][lightning talk video][slides]
Acceptance Rate: 21% (74/351)
Brownian Bubble Router: Enabling Deadlock Freedom via Guaranteed Forward Progress
Mayank Parasar, Ankit Sinha, and Tushar Krishna
In Proc of 11th International Symposium on Networks-on-Chip (NOCS), Oct 2018
[pdf]
Architecting a Secure Wireless Network-on-Chip
Brian Lebiednik, Sergi Abadal, Hyouk Jun Kwon and Tushar Krishna
In Proc of 11th International Symposium on Networks-on-Chip (NOCS), Oct 2018
(Special Session Paper)
[pdf]
Synchronized Progress in Interconnection Networks (SPIN) : A New Theory for Deadlock Freedom
Aniruddh Ramrakhyani, Paul Gratz, and Tushar Krishna
In Proc of 45th International Symposium on Computer Architecture (ISCA), Jun 2018
++Selected for Inclusion in IEEE Micro’s ‘Top Picks in Computer Architecture’ Journal (2019 issue)
[pdf][lightning talk video][slides]
Acceptance Rate: 16.9% (64/378)
FastTrack: Leveraging Heterogeneous FPGA Wires to Design Low-cost High-performance Soft NoCs
Nachiket Kapre and Tushar Krishna
In Proc of 45th International Symposium on Computer Architecture (ISCA), Jun 2018
[pdf][lightning talk video][slides]
Acceptance Rate: 16.9% (64/378)
SEESAW: Using Superpages to Improve VIPT Caches
Mayank Parasar, Abhishek Bhattacharjee, and Tushar Krishna
In Proc of 45th International Symposium on Computer Architecture (ISCA), Jun 2018
[pdf][lightning talk video][slides]
Acceptance Rate: 16.9% (64/378)
Performance Implications of NoCs on 3D-Stacked Memories: Insights From the Hybrid Memory Cube
Ramyad Hadidi, Bahar Asgari, Jeffrey Young, Burhan Ahmad Mudassar, Kartikay Garg, Tushar Krishna, and Hyesoon Kim
In Proc of the IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Apr 2018
[pdf]
Acceptance Rate: 31.3% (21/67)
MAERI: Enabling Flexible Dataflow Mapping over DNN Accelerators via Reconfigurable Interconnects
Hyoukjun Kwon, Ananda Samajdar, and Tushar Krishna
In Proc of the 23rd ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Mar 2018
++Selected for Honorable Mention in IEEE Micro’s ‘Top Picks in Computer Architecture’ Journal (2019 issue)
[pdf][slides][poster]
Acceptance Rate: 17.5% (56/319)
LATR: Lazy Translation Coherence
Mohan Kumar, Steffen Maass, Sanidhya Kashyap, Jan Vesely, Zi Yan, Taesoo Kim, Abhishek Bhattacharjee, and Tushar Krishna
In Proc of the 23rd ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Mar 2018
[pdf]
Acceptance Rate: 17.5% (56/319)
Optimizing the data placement and transformation for multi-bank CGRA computing system
Zhongyuan Zhao, Yantao Liu, Weiguang Sheng, Tushar Krishna, Qin Wang and Zhigang Mao
In Proc of Design Automation and Test in Europe (DATE), Mar 2018
[pdf]
Acceptance Rate: 24% (185/766)
MAERI: Enabling Flexible Dataflow Mapping over DNN Accelerators via Programmable Interconnects
Hyoukjun Kwon, Ananda Samajdar, and Tushar Krishna
In Inaugural SysML Conference, Feb 2018
[pdf]
Spoofing Prevention via RF Power Profiling in Wireless Network-on-Chip
Brian Lebiednik, Sergi Abadal, Hyouk Jun Kwon and Tushar Krishna
In Proc of 3rd International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems (AISTECS), Jan 2018
[Held in conjunction with the 13th HiPEAC Conference on High Performance Embedded Architectures and Compilers]
[pdf]
2017
A Case for Low Frequency Single Cycle Multi Hop NoCs for Energy Efficiency and High Performance
Monodeep Kar and Tushar Krishna
In Proc of the IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov 2017
[pdf]
Acceptance Rate: 26% (105/399)
Lightweight Emulation of Virtual Channels using Swaps
Mayank Parasar and Tushar Krishna
In Proc of 10th International Workshop on Network-on-Chip Architectures (NocArc), Oct 2017
[Held in conjunction with the 50th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-50)]
[pdf]
Rethinking NoCs for Spatial Neural Network Accelerators
Hyoukjun Kwon, Ananda Samajdar, and Tushar Krishna
In Proc of 11th International Symposium on Networks-on-Chip (NOCS), Oct 2017
[pdf]
Acceptance Rate: 32% (14/44)
Adaptive Manycore Architectures for Big Data Computing
Janardhan Rao Doppa, Ryan Gary Kim, Mihailo Isakov, Michel A. Kinsy, Hyoukjun Kwon, and Tushar Krishna
In Proc of 11th International Symposium on Networks-on-Chip (NOCS), Oct 2017
(Special Session Paper)
[pdf]
OpenSMART: Single-Cycle Multi-hop NoC Generator in BSV and Chisel
Hyoukjun Kwon and Tushar Krishna
In Proc of the IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Apr 2017
[pdf]
Acceptance Rate: 29% (24/81)
Automatic Place-and-Route of emerging LED-driven wires within a monolithically-integrated CMOS+III-V process
Tushar Krishna, Arya Balachandran, Siau Ben Chiah, Li Zhang, Bing Wang, Cong Wang, Kenneth Lee Eng Kian, Jurgen Michel and Li-Shiuan Peh
In Proc of Design Automation and Test in Europe (DATE), Mar 2017
++ Winner of the Best Paper Award – Design Methods and Tools Track
[pdf]
Acceptance Rate: 24% (194/794)
Static Bubble: A Framework for Deadlock-free Irregular On-chip Topologies
Aniruddh Ramrakhyani and Tushar Krishna
In Proc of the 23rd IEEE International Symposium on High-Performance Computer Architecture (HPCA), Feb 2017
[pdf]
Acceptance Rate: 22% (50/224)
Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks
Yu-Hsin Chen, Tushar Krishna, Joel Emer, and Vivienne Sze
In IEEE Journal of Solid State Circuits Conference (JSSC), ISSCC Special Issue, Jan 2017
[pdf] | [Website]
2016
Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks
Yu-Hsin Chen, Tushar Krishna, Joel Emer, and Vivienne Sze
In Proc of the IEEE International Solid-State Circuits Conference (ISSCC), Feb 2016
[pdf] | [Website]
2015
Efficient Control and Communication Paradigms for Coarse-Grained Spatial Architectures
M. Pellauer, A. Parashar, M. Adler, B. Ahsan, R. Allmon, N. Crago, K. Fleming, M. Gambhir, A. Jaleel, T. Krishna, D. Lustig, S. Maresh, V. Pavlov, R. Rayess, A. Zhai, and J. Emer
In ACM Transactions on Computer Systems (TOCS), Sep 2015
[pdf]
2014
Single-Cycle Collective Communication Over A Shared Network Fabric
Tushar Krishna and Li-Shiuan Peh
In Proc of 8th International Symposium on Networks-on-Chip (NOCS), Sep 2014
++Winner of the Best Paper Award
[pdf]
Acceptance Rate: 25% (21/83)
SCORPIO: 36-Core Shared-Memory Processor Demonstrating Snoopy Coherence on a Mesh Interconnect
Chia-Hsin Owen Chen, Sunghyun Park, Suvinay Subramanian, Tushar Krishna, Bhavya K. Daya, Woo-Cheol Kwon, Brett Wilkerson, John Arends, Anantha P. Chandrakasan, and Li-Shiuan Peh
In Hot Chips 26: A Symposium on High Performance Chips, Aug 2014
[pdf]
SCORPIO: A 36-Core Research Chip Demonstrating Snoopy Coherence on a Scalable Mesh NoC with In-Network Ordering
Bhavya K. Daya, Chia-Hsin Owen Chen, Suvinay Subramanian, Woo-Cheol Kwon, Sunghyun Park, Tushar Krishna, Jim Holt, Anantha P. Chandrakasan, and Li-Shiuan Peh
In Proc of 41st International SymposiumComputer Architecture (ISCA), Jun 2014
[pdf]
Acceptance Rate: 18% (46/258)
SMART: Single-Cycle Multihop Traversals Over A Shared Network-on-Chip
Tushar Krishna, Chia-Hsin Owen Chen, Woo-Cheol Kwon, and Li-Shiuan Peh
In IEEE MICRO (Special Issue: Top Picks from the Computer Architecture Conferences), May/Jun 2014
[pdf]
Locality-Oblivious Cache Organization leveraging Single-Cycle Multi-Hop NoCs
Woo-Cheol Kwon, Tushar Krishna, and Li-Shiuan Peh
In Proc of 19th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Mar 2014
[pdf]
Acceptance Rate: 22% (49/217)
2013
Single-Cycle Multihop Asynchronous Repeated Traversal: A SMART Future for Reconfigurable On-Chip Networks
Tushar Krishna, Chia-Hsin Owen Chen, Sunghyun Park, Woo-Cheol Kwon, Suvinay Subramanian, Anantha P. Chandrakasan, and Li-Shiuan Peh
In IEEE Computer, Oct 2013
[pdf] | [Webex Interview with Guest Editor]
SMART: A Single-Cycle Reconfigurable NoC for SoC Applications
Chia-Hsin Owen Chen, Sunghyun Park, Tushar Krishna, Suvinay Subramanian, Anantha P. Chandrakasan, and Li-Shiuan Peh
In Proc of Design Automation and Test in Europe (DATE), Mar 2013
[pdf]
Acceptance Rate: 25% (206/829)
Breaking the On-Chip Latency Barrier Using SMART
Tushar Krishna, Chia-Hsin Owen Chen, Woo Cheol Kwon and Li-Shiuan Peh
In Proc of the 19th IEEE International Symposium on High-Performance Computer Architecture (HPCA), Feb 2013
++Selected for Inclusion in IEEE Micro’s ‘Top Picks in Computer Architecture’ Journal (2014 issue)
[pdf]
Acceptance Rate: 20% (51/249)
2012
SWIFT: A Low-Power Network-On-Chip Implementing the Token Flow Control Router Architecture With Swing-Reduced Interconnects
Jacob Postman, Tushar Krishna, Christopher Edmonds, Li-Shiuan Peh, and Patrick Chiang
In IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI), Aug 2012
[pdf]
Approaching the Theoretical Limits of a Mesh NoC with a 16-Node Chip Prototype in 45nm SOI
Sunghyun Park, Tushar Krishna, Chia-Hsin Owen Chen, Bhavya K. Daya, Anantha P. Chandrakasan, and Li-Shiuan Peh
In Proc of the 49th ACM/EDAC/IEEE Design Automation Conference (DAC), Jun 2012
[pdf]
Acceptance Rate: 22% (164/741)
2011
Towards the Ideal On-chip Fabric for 1-to-Many and Many-to-1 Communication
Tushar Krishna, Li-Shiuan Peh, Bradford M. Beckmann, and Steven K. Reinhardt
In Proc of the 44th IEEE/ACM International Symposium on Microarchitecture (MICRO), Dec 2011
[pdf]
Acceptance Rate: 21% (44/208)
A Low-Swing Crossbar and Link Generator for Low-Power Networks-on-Chip
Chia-Hsin Owen Chen, Sunghyun Park, Tushar Krishna, and Li-Shiuan Peh
In Proc of the IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov 2011
[pdf]
Acceptance Rate: 30% (106/349)
The gem5 Simulator
N. Binkert, B. Beckmann, G. Black, S. Reinhardt, A. Saidi, A. Basu, J. Hestness, D. Hower, T. Krishna, S. Sardashti, R. Sen, K. Sewell, M. Shoaib, N. Vaish, M. Hill and D. Wood
In SIGARCH Computer Architecture News (CAN) 39 (2), May 2011
[pdf] | [www.gem5.org]
2010
SWIFT: A SWing-reduced Interconnect For a Token-based Network-on-Chip in 90nm CMOS
Tushar Krishna, Jacob Postman, Christopher Edmonds, Li-Shiuan Peh, and Patrick Chiang
In Proc of the 28th IEEE International Conference on Computer Design (ICCD), Oct 2010
[pdf]
Acceptance Rate: 29% (79/267)
Phyical vs Virtual Express Topologies with Low-Swing Links for Future Many-core NoCs
Chia-Hsin Owen Chen, Niket Agarwal, Tushar Krishna, Kyung-Hoae Koo, Li-Shiuan Peh, and Krishna C. Saraswat
In Proc of the 4th IEEE/ACM International Symposium on Networks-on-Chip (NOCS), May 2010
[pdf]
Acceptance Rate: 27% (32/118)
2009
Express Virtual Channels with Capacitively Driven Global Links
Tushar Krishna, Amit Kumar, Jacob Postman, Patrick Chiang, Mattan Erez, and Li-Shiuan Peh
In IEEE MICRO (Special Issue: Top Pics from Hot Interconnects 16), Jul/Aug 2009
[pdf]
GARNET: A Detailed On-Chip Network Model inside a Full-System Simulator
Niket Agarwal, Tushar Krishna, Li-Shiuan Peh, and Niraj K. Jha
In Proc of the IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Apr 2009
[pdf]
Acceptance Rate: 28% (24/86)
2008
Texture Filter Memory – A Power-efficient and Scalable Texture Memory Architecture for Mobile Graphics Processors
B. V. N. Silpa, Anjul Patney, Tushar Krishna, Preeti R. Panda, and G. S. Visweswaran
In Proc of the IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov 2008
[pdf]
Acceptance Rate: 26% (122/458)
NoC with Near-Ideal Express Virtual Channels Using Global-Line Communication
Tushar Krishna, Amit Kumar, Patrick Chiang, Mattan Erez, and Li-Shiuan Peh
In Proceedings of the 16th International Symposium on High-Performance Interconnects (HotI), Aug 2008
++Selected for Inclusion in IEEE Micro’s ‘Top Pics from Hot Interconnects’ (2009 issue)
[pdf]
Acceptance Rate: 30% (19/63)
arXiv and Tech Reports
SCALE-sim: Systolic CNN Accelerator
Ananda Samajdar, Yuhao Zhu, Paul Whatmough, Matthew Mattina, and Tushar Krishna
arXiv, Oct 2018
[pdf]
MAESTRO: An Open-source Infrastructure for Modeling Dataflows within Deep Learning Accelerators
Hyoukjun Kwon, Michael Pellauer, and Tushar Krishna
arXiv, May 2018
[pdf]
Performance Implications of NoCs on 3D-Stacked Memories: Insights from the Hybrid Memory Cube
Ramyad Hadidi, Bahar Asgari, Jeffrey Young, Burhan Ahmad Mudassar, Kartikay Garg, Tushar Krishna, and Hyesoon Kim
arXiv, July 2017
[pdf]
FASHION: Fault-Aware Self-Healing Intelligent On-chip Network
Pengju Ren, Michel A.Kinsy, Mengjiao Zhu, Shreeya Khadka, Mihailo Isakov, Aniruddh Ramrakhyani, Tushar Krishna, and Nanning Zheng
arXiv, Feb 2017
[pdf]
VESPA: VIPT Enhancements for Superpage Accesses
Mayank Parasar, Abhishek Bhattacharjee, and Tushar Krishna
arXiv, Jan 2017
[pdf]
